Educational goals

The course provides the methodological and technological knowledge for analysis and synthesis of modern embedded systems ( ie those general and special computer system designed for embedded in industrial (transport, energy, mechanical, etc.) or consumer products (telephony, entertainment, multimedia processing, etc.), bound to meet certain requirements as real-time and performance, as well as requirements on consumption, size, reliability and security.

The student is started to the design of embedded systems based on SoC (System on Chip), MPSoC (on Single Chip Multi Processor) and special (DSP, dedicated hardware) architecture, also made with FPGA technologies. Development methodologies and IDE environments widely used in industry, will be used for the design process.

A large part of the course will be spent in practice in which the student will use industrial IDE environments (HDL compilers – VHDL, Verilog, System-C, debugger, simulators and tools for mapping). This part goal is to provide the necessary knowledge for synthesis of circuits on FPGA and for the design of SOC system:

• with ARM processor on STMicroelectronics STM32F4;
• with Sparc processor synthesized on FPGA on Digilent Nexys 2;
• with Intel processor on board Galileo.

In this context, a full project will be developed by the entire classroom: to realize a complete embedded system, the class will be divided into groups. Each of them will have a task assigned and, following industrial design and development process, they will meet frequently to establish interfaces of their tasks so that at the end of the course all of them will be able to merge all their works into the final product.

Course Overview

The “Elaboration System Architectures” (ASE) course starts in the first semester of the Computer Science master course first year. It comprehends 9 CFU, split in 51 hours in lessons, 18 hours in exercises and 18 hours in practical laboratories, for a total of 87 hours. Student's estimated effort is of 2h per hour of lesson; 1h per hour of exercise and 1h per hour of practical laboratory. As 1 CFU = 24h, whose 12h are for lesson, 6h for exercises and 6 for practical laboratory, from the course 9 CFU derives a load for the student of 9 CFU x 24h = 216h. These hours of work are so divided: 12 x 9 = 108h of lesson, 54h of exercises and 54h of practical laboratory. The professor will have to distribute, according to this load: 108/3 = 36h of lesson; 54/2 = 27h of exercises; 54/2 = 27h of practical laboratory; for a total of 90 hours in 13 weeks, with 7h per week.

Prerequisites

The course widely refers to the arguments already treated by the courses of “Fundamentals of Computer Science I and II”, “Logical Networks” and “Computers Architectures I” of the bachelor course of studies.

Educational Goals

The course supplies the student with designing methodologies basics, needed for modern digital systems realisation (microprocessor systems, sensors and I/O devices). The student will acquire methods and techniques for the components design of dedicated elaboration systems (embedded systems) and general purpose elaboration systems. Moreover, he/she will acquire skills on the usage of hardware design tools and languages, needed by the entire development cycle of a medium complexity system, including the synthesis on FPGA and functional tests.